1. Field of the Invention
The present invention is related to a semiconductor apparatus having a trench structure and a method of manufacturing the same.
2. Description of Related Art
A power metal-oxide semiconductor field-effect transistor (MOSFET) is a typical semiconductor apparatus that has both a high withstand voltage and a large current capacity. There are two types of power MOSFET: lateral power MOSFET and vertical power MOSFET. The lateral power MOSFET is designed so that operating current (drain current) flows horizontally through a semiconductor substrate. The vertical power MOSFET is designed so that drain current flows vertically through a semiconductor substrate. The vertical power MOSFET has become common since it is superior to the lateral power MOSFET in being easy to realize a high density unit cell structure and thus allowing an increase in on-current. Particularly distinguished is a vertical power MOSFET having a trench structure where a channel is perpendicular to a substrate, which is described in Japanese Unexamined Patent Publication No. 2001-60688, 10-270689, 09-213951, 2004-79955 and 2004-55976, for example.
FIG. 8 is a plan view showing the structure of the main part of a vertical power MOSFET having a trench structure according to a first conventional example. FIG. 9A is a sectional view along line IXA-IXA in FIG. 8, and FIG. 9B is a sectional view along line IXB-IXB in FIG. 8. As shown in FIGS. 8, 9A and 9B, the vertical power MOSFET 400 includes a semiconductor substrate 101, a drift region 102, a base region 103, a source region 104, a trench 105, a gate oxide film 106, a gate electrode 107, a unit cell 108, an interlayer insulating film 110, a contact hole 111, a source electrode 112, and a drain electrode 113.
In the vertical power MOSFET 400 of the first conventional example, on an n+ type semiconductor substrate (high impurity concentration semiconductor substrate) 101, the drift region 102 composed of an n− type semiconductor layer (low impurity concentration semiconductor layer) that is an epitaxial layer having a lower impurity concentration than the semiconductor substrate 101 is formed. Further, p-type impurity is ion-implanted into the n− semiconductor layer to form the p-type base region 103. On the periphery of the p-type base region 103 is formed the trench 105 with a depth that reaches down to the drift region 102. The trench structure of the first conventional example is a typical structure that is used most frequently.
The gate oxide film 106 is formed on the inner surface of the trench 105. The gate electrode 107 made of polysilicon or the like is formed on the gate oxide film 106 so as to fill the trench 105. Further, n-type impurity is ion-implanted into the surface of the p-type base region 103 to form the endless n+ type source region 104 along the trench 105. The trench 105 has a rectangular shape as shown in FIG. 8. A trench gate is formed along a plane direction equivalent to a plane (100) on the Si (001) substrate surface, which is referred to herein as the plane [100].
Above the p-type base region 103, the n+ type source region 104, the gate oxide film 106 and the gate electrode 107 are the interlayer insulating film 110 and the source electrode 112 which are laminated in this order. The interlayer insulating film 110 has the contact hole 111, through which the source electrode 112 is electrically connected to the p-type base region 103 and the n+ type source region 104. The drain electrode 113 is formed on the backside of the semiconductor substrate 101 which is opposite from the principal surface where the trench 105 is formed.
In the vertical power MOSFET having such a structure, a pn junction that is created in the interface between the drift region 102 and the base region 103 is depleted of charge carriers due to reverse bias during Off-state. During On-state, on the other hand, a FET inversion layer is formed on the side surface of the trench 105, and thereby a current flows from the drain electrode 113 to the source electrode 112 as indicated by the arrow c in FIG. 9B. It is preferred to design the vertical power MOSFET so that On-state current is as high as possible with respect to Off-state withstand voltage.
Since the vertical power MOSFET is used in connection with an inductor, reverse withstand voltage is applied between the drain and source during switch-off, and current flow beyond a certain design limit can result in breakdown of devices. A degree to tolerate breakdown current is called device breakdown tolerance, and a device is preferably designed to have high breakdown tolerance.
It is important for the vertical power MOSFET to prevent device breakdown. The device breakdown of the vertical power MOSFET is caused by the operation of NPN bipolar transistor, which is referred to herein as the parasitic bipolar transistor, where source, base and drain serve as emitter, base and collector, respectively. Specifically, if part of dielectric current flows into the base as shown by a current path d that is indicated by the arrow in FIG. 9B and a base voltage increases, the parasitic bipolar transistor turns on to apply positive feedback during a temperature increase and a current increase, which eventually causes device breakdown.
In the first conventional example described above, current is likely to concentrate at a cell corner of a rectangular trench. Breakdown thereby tends to occur at the cell corner and its vicinity, which can cause the parasitic bipolar transistor to turn on.
Japanese Unexamined Patent Publication No. 2001-60688 mentioned above, which is referred to herein as a second conventional example, proposes a structure to prevent a decrease in device breakdown tolerance. FIG. 10 is a plan view showing the structure of a main part of a vertical power MOSFET 500 having a trench structure according to the second conventional example. FIG. 11A is a sectional view along line XIA-XIA in FIG. 10, and FIG. 11B is a sectional view along line XIB-XIB in FIG. 10. In the following description, the same elements as in the vertical power MOSFET 400 of the first conventional example are denoted by the same reference symbols and not detailed herein.
The vertical power MOSFET 500 of the second conventional example has a narrow source region 116 that is formed diagonally from a contact part of a unit cell where an electric field concentrates to the corners of the cell. Due to the presence of the narrow source region 116, the length of a source part (L5 in FIG. 11B) along the diagonal of a cell is shorter than that (L4 in FIG. 9B) of the first conventional example. In this structure, the distance of a current path e (see FIG. 11B) from the drain electrode to the source electrode is shorter than the distance of a current path d (see FIG. 9B). This reduces the part where the current path e passes through the base, thereby lowering resistance in the base part. It is therefore possible to reduce an increase in base voltage that occurs when part of dielectric current flows into the base, which hinders the activation of the parasitic bipolar transistor. This allows suppressing a decrease in device breakdown tolerance.
Japanese Unexamined Patent Publication No. 10-270689 describes a technique that forms a side surface of a trench with the plane [100] and [110] so as to improve the uniformity of a gate insulating film and increase gate withstand voltage. Japanese Unexamined Patent Publication No. 09-213951 describes a technique that makes the plane shape of a side surface of a trench octagon and quadrangle and forms their side surfaces with the plane [100] and [110]. Further, Japanese Unexamined Patent Publication No. 09-213951 and 2004-79955 propose the structure that uses the plane [100] and [110] with high mobility for a trench side surface and preferably makes the plane [100] larger than the plane [110], thereby reducing on-resistance.
As electronic equipment achieve small-size, light-weight, high-speed operation and high-frequency performance, the need increases for higher density integration of a semiconductor device to be mounted on the electronic equipment. It is thus strongly required for vertical power MOSFET to further reduce the cell size while preventing a decrease in device breakdown tolerance.
However, the semiconductor apparatus according to Japanese Unexamined Patent Publication No. 2001-60688 is unfavorable for the further reduction of cell size since it needs to place the narrow source region 116. The semiconductor apparatus according to Japanese Unexamined Patent Publication No. 09-213951 is also unfavorable for the further reduction of cell size since the trench is composed of a combination of octagon and quadrangle shapes. Further, the mere enlargement of the plane [100] with respect to the plane [110] that is proposed by Japanese Unexamined Patent Publication No. 09-213951 and 2004-79955 can result in easy activation of a parasitic bipolar transistor due to an increase in base voltage.